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Graphene and layered materials boost silicon technologies

Posted By Graphene Council, The Graphene Council, Saturday, November 16, 2019
Updated: Friday, November 8, 2019
Silicon semiconductor technology has done marvels for the advancement of our society, which has benefited tremendously from its versatile use and amazing capabilities. The development of electronics, automation, computers, digital cameras and smartphones based on this material and its underpinning technology has reached skyrocket limits, downscaling the physical size of devices and wires to the nanometre regime. 

Although this technology has been growing since the late 1960s, the miniaturization of circuits seems to have reached a possible halt, since transistors can only be shrunk down to a certain size and not further beyond. Thus, there is a pressing need to complement Si CMOS technology with new materials and fulfil the future computing requirements as well as the needs for diversification of applications.

Graphene and related materials offer prospects of advances in device performance at the atomic limit.  They provide a possible solution to overcome the limitations of silicon technology, where the combination of layered materials with silicon chips promises to surpass the current technological limitations.

A team of researchers including Stijn Goossens and Frank Koppens, based at Graphene Flagship partner ICFO, and industrial leaders from Graphene Flagship partner IMEC and TSMC provided an in-depth and thorough review of opportunities, progress and challenges of integrating atomically thin materials with Si-based technology. They give insights on how and why layered materials could overcome current challenges posed by the existing technology and how they can enhance both device component function and performance, to boost the features of future technologies, in the areas of computational and non-computational applications.

For non-computational applications, they review the possible integration of these materials for future cameras, low power optical data communications and gas and bio-sensors. In particular, in image sensors and photodetectors, graphene and related materials could enable new vision in the infrared and terahertz range in addition to the visible range of the spectrum. These can serve for example in autonomous vehicles, security at airports and augmented reality.

For computational systems, and in particular in the field of transistors, they show how challenges such as doping, contact resistance and dielectrics/encapsulation can be diminished when integrating layered materials with Si technology. Layered materials could also improve memory and data storage devices with novel switching mechanisms for meta-insulator-metal structures, avoid sneak currents in memory arrays, or even push the performance gains of copper wire-based circuitry by adhering graphene to the ultrathin copper barrier materials and thus reduce resistance, scattering and self-heating.

The review provides a roadmap of layered material integration and CMOS technology, pinpointing the stage at which all challenges regarding growth, transfer, interface, doping, contacting, and design are currently standing today and what possible processes are expected to be resolved to achieve such goals of moving from a research laboratory environment to a pilot line for production of the first devices that combine both technologies. The layered materials-CMOS roadmap, as presented in this review, gives an exciting glimpse into the future, with pilot production expected to be just a few years from now.

Frank Koppens, Graphene Flagship Work Package Leader for Photonics and Optoelectronics and lead author of the study, says: "Now we have a clear industry-driven roadmap on layered material-silicon technologies and manufacturing. Complementing the established silicon technology with layered materials is key to combine the best of both worlds and enable a plethora of large volume and low-cost applications."

Marco Romagnoli, Graphene Flagship Work Package Leader for Wafer-Scale System Integration, comments: "This is an interesting paper complementing a previous one focused on graphene photonics for telecommunications that completes the range of applications in which graphene can be exploited for large scale production in CMOS environments. Also interesting is the type of application, in which graphene can best exploit its characteristics, from IR/THz cameras to low-power electronic switching and memories.

Andrea C. Ferrari, Science and Technology Officer of the Graphene Flagship and Chair of its Management Panel, adds: "The integration of graphene and related materials with silicon and CMOS technology is the next goal for the Flagship. For this reason, we will fund the first foundry focussed on the integration of layered materials. This work clearly spells out the vision for the transformative technology that integration will enable."

Tags:  Andrea C. Ferrari  Frank Koppens  Graphene  Graphene Flagship  ICFO  Marco Romagnoli  optoelectronics  photonics  Semiconductor  Stijn Goossens  transistor 

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Clarification of a new synthesis mechanism of semiconductor atomic sheet

Posted By Graphene Council, The Graphene Council, Tuesday, September 24, 2019
In Japan Science and Technology Agency's Strategic Basic Research Programs, Associate Professor Toshiaki Kato and Professor Toshiro Kaneko of the Department of Electronic Engineering, Graduate School of Engineering, Tohoku University succeeded in clarifying a new synthesis mechanism regarding transition metal dichalcogenides (TMD)1), which are semiconductor atomic sheets having thickness in atomic order.

Because it is difficult to directly observe the aspect of the growing process of TMD in a special environment, the initial growth process remained unclear, and it has been desirable to elucidate a detailed mechanism of synthesis to obtain high-quality TMD.

An in-situ observing synthesis method2) has been developed by our research group to examine the growth aspect of TMD as a real-time optical image in a special high temperature atmosphere of about 800°C in the presence of corrosive gases. In addition, a synthesis substrate, which is a mechanism to control diffusion during the crystal growth of a precursor3), has been developed in advance; further, it has been clarified that the growing precursor diffuses a distance about 100 times larger than in conventional semiconductor materials. 

It was also demonstrated that nucleation occurs due to the involvement of the precursor in a droplet state. Furthermore, by utilizing this method, a large-scale integration of more than 35,000 monolayer single crystal atomic sheets has been achieved on a substrate in a practical scale (Figure 1).

Utilizing the results of the present research, the large-scale integration of atomic-order thick4) semiconductor atomic sheets can be fabricated and is expected to be put into practical use in the field of next-generation flexible electronics.

Tags:  Electronics  Graphene  Semiconductor  Tohoku University  Toshiaki Kato  Toshiro Kaneko 

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Graphene in Electronic Circuits

Posted By Graphene Council, The Graphene Council, Wednesday, July 31, 2019
Updated: Tuesday, July 30, 2019
Ever since graphene was discovered in 2004, researchers around the world have been working to develop commercially scalable applications for this high-performance material.

Graphene is 100 to 300 times stronger than steel at the atomic level and has a maximum electrical current density orders of magnitude greater than that of copper, making it the strongest, thinnest and, by far, the most reliable electrically conductive material on the planet. It is, therefore, an extremely promising material for interconnects, the fundamental components that connect billions of transistors on microchips in computers and other electronic devices in the modern world.

For over two decades, interconnects have been made of copper, but that metal encounters fundamental physical limitations as electrical components that incorporate it shrink to the nanoscale. “As you reduce the dimensions of copper wires, their resistivity shoots up,” said Kaustav Banerjee, a professor in the Department of Electrical and Computer Engineering. “Resistivity is a material property that is not supposed to change, but at the nanoscale, all properties change.”

As the resistivity increases, copper wires generate more heat, reducing their current-carrying capacity. It’s a problem that poses a fundamental threat to the $500 billion semiconductor industry. Graphene has the potential to solve that and other issues. One major obstacle, though, is designing graphene micro-components that can be manufactured on-chip, on a large scale, in a commercial foundry.

“Whatever the component, be it inductors, interconnects, antennas or anything else you want to do with graphene, industry will move forward with it only if you find a way to synthesize graphene directly onto silicon wafers,” Banerjee said. He explained that all manufacturing processes related to the transistors, which are made first, are referred to as the ‘front end.’ To synthesize something at the back-end — that is, after the transistors are fabricated — you face a tight thermal budget that cannot exceed a temperature of about 500 degrees Celsius. If the silicon wafer gets too hot during the back-end processes employed to fabricate the interconnects, other elements that are already on the chip may get damaged, or some impurities may start diffusing, changing the characteristics of the transistors.

Now, after a decade-long quest to achieve graphene interconnects, Banerjee’s lab has developed a method to implement high-conductivity, nanometer-scale doped multilayer graphene (DMG) interconnects that are compatible with high-volume manufacturing of integrated circuits. A paper describing the novel process was named one of the top papers at the 2018 IEEE International Electron Devices Meeting (IEDM),  from more than 230 that were accepted for oral presentations. It also was one of only two papers included in the first annual “IEDM Highlights” section of an issue of the journal Nature Electronics.

Banerjee first proposed the idea of using doped multi-layer graphene at the 2008 IEDM conference and has been working on it ever since. In February 2017 he led the experimental realization of the idea by Chemical Vapor Deposition (CVD) of multilayer graphene at a high temperature, subsequently transferring it to a silicon chip, then patterning the multilayer graphene, followed by doping. Electrical characterization of the conductivity of DMG interconnects down to a width of 20 nanometers established the efficacy of the idea that was proposed in 2008. However, the process was not “CMOS-compatible” (the standard industrial-scale process for making integrated circuits), since the temperature of CVD processes far exceed the thermal budget of back-end processes.

To overcome this bottleneck, Banerjee’s team developed a unique pressure-assisted solid-phase diffusion method for directly synthesizing a large area of high-quality multilayer graphene on a typical dielectric substrate used in the back-end CMOS process. Solid-phase diffusion, well known in the field of metallurgy and often used to form alloys, involves applying pressure and temperature to two different materials that are in close contact so that they diffuse into each other.

Banerjee’s group employed the technique in a novel way. They began by depositing solid-phase carbon in the form of graphite powder onto a deposited layer of nickel metal of optimized thickness. Then they applied heat (300 degrees Celsius) and nominal pressure to the graphite powder to help break down the graphite. The high diffusivity of carbon in nickel allows it to pass rapidly through the metal film.

How much carbon flows through the nickel depends on its thickness and the number of grains it holds. “Grains” refer to the fact that deposited nickel is not a single-crystal metal, but rather a polycrystalline metal, meaning it has areas where two single-crystalline regions meet each other without being perfectly aligned. These areas are called grain boundaries, and external particles — in this case, the carbon atoms — easily diffuse through them. The carbon atoms then recombine on the other surface of the nickel closer to the dielectric substrate, forming multiple graphene layers.

Banerjee’s group is able to control the process conditions to produce graphene of optimal thickness. “For interconnect applications, we know how many layers of graphene are needed,” said Junkai Jiang, a Ph.D. candidate in Banerjee’s lab and lead author of the 2018 IEDM paper. “So we optimized the nickel thickness and other process parameters to obtain precisely the number of graphene layers we want at the dielectric surface. “Subsequently, we simply remove the nickel by etching so that what’s left is only very high-quality graphene — virtually the same quality as graphene grown by CVD at very high temperatures,” he continued. “Because our process involves relatively low temperatures that pose no threat to the other fabricated elements on the chip, including the transistors, we can make the interconnects right on top of them.”

UCSB has filed a provisional patent on the process, which overcomes the obstacles that, until now, have prevented graphene from replacing copper. Bottom line: graphene interconnects help to create faster, smaller, lighter, more flexible, more reliable and more cost-effective integrated circuits. Banerjee is currently in talks with industry partners interested in potentially licensing this CMOS-compatible graphene synthesis technology, which could pave the way for what would be the first 2D material to enter the mainstream semiconductor industry.

Tags:  2D materials  CVD  Graphene  Graphite  Junkai Jiang  Kaustav Banerjee  Semiconductor  UC Santa Barbara 

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New method of synthesising nanographene on metal oxide surfaces

Posted By Graphene Council, The Graphene Council, Tuesday, March 5, 2019
Updated: Tuesday, March 5, 2019

Nanostructures based on carbon are promising materials for nanoelectronics.

However, to be suitable, they would often need to be formed on non-metallic surfaces, which has been a challenge – up to now. Researchers at FAU have found a method of forming nanographenes on metal oxide surfaces. Their research, conducted within the framework of collaborative research centre 953 – Synthetic Carbon Allotropes funded by the German Research Foundation (DFG), has now been published in the journal Science.



Two-dimensional, flexible, tear-resistant, lightweight, and versatile are all properties that apply to graphene, which is often described as a miracle material. In addition, this carbon-based nanostructure has unique electrical properties that make it attractive for nanoelectronic applications. Depending on its size and shape, nanographene can be conductive or semi-conductive – properties that are essential for use in nanotransistors. Thanks to its good electrical and thermal conductivity, it could also replace copper (which is conductive) and silicon (which is semi-conductive) in future nanoprocessors.

Nanographene on metal oxides

The problem: In order to create an electronic circuit, the molecules of nanographene must be synthesised and assembled directly on an insulating or semi-conductive surface. Although metal oxides are the best materials for this purpose, in contrast to metal surfaces, direct synthesis of nanographenes on metal oxide surfaces is not possible as they are considerably less chemically reactive. The researchers would have to carry out the process at high temperatures, which would lead to several uncontrollable secondary reactions.

A team of scientists led by Dr. Konstantin Amsharov from the Chair of Organic Chemistry II have now developed a method of synthesising nanographenes on non-metallic surfaces, that is insulating surfaces or semi-conductors.

It’s all about the bond

The researchers’ method involves using a carbon fluorine bond, which is the strongest carbon bond. It is used to trigger a multilevel process. The desired nanographenes form like dominoes via cyclodehydrofluorination on the titanium oxide surface. All ‘missing’ carbon-carbon bonds are thus formed after each other in a formation that resembles a zip being closed.

This enables the researchers to create nanographenes on titanium oxide, a semi-conductor. This method also allows them to define the shape of the nanographene by modifying the arrangement of the preliminary molecules. New carbon-carbon bonds and, ultimately, nanographenes form where the researchers place the fluourine atoms.

For the first time, these research results demonstrate how carbon-based nanostructures can be manufactured by direct synthesis on the surfaces of technically-relevant semi-conducting or insulating surfaces. ‘This groundbreaking innovation offers effective and simple access to electronic nanocircuits that really work, which could scale down existing microelectronics to the nanometre scale,’ explains Dr. Amsharov.

Tags:  Friedrich-Alexander-Universität Erlangen-Nürnberg  Graphene  Konstantin Amsharov  nanoelectronics  nanographene  Semiconductor 

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Graphene Interlayer Fixes the Schottky Diode

Posted By Dexter Johnson, IEEE Spectrum, Friday, February 10, 2017

Schottky diodes are the grand daddy of semiconductor devices. They are formed when a semiconductor material is combined with a metal and the junction between the two materials creates the Schottky diode. Despite being around since forever, it’s never been quite possible to make them into an ideal diode in which when a voltage is applied it acts as conductor and when the voltage is reversed it serves as a insulator.

Now researchers at the Ulsan National Institute of Science and Technology (UNIST) in Korea have been able to produce the ideal version of the Schottky diode by inserting a graphene layer between the semiconductor and the metal, and in the process have eliminated 50 years of head scratching over this issue. 

In research described in the journal Nano Letters, the UNIST researchers discovered that graphene serves to prevent the intermixing of atoms that occurs when the semiconductor and metal are touching each other directly.

“The space between the carbon atoms that make up the graphene layer has a high quantum mechanical electron density and therefore no atoms can pass through it,” said Kibog Park, a professor at UNIST and co-author of the paper, in a press release. “Therefore, by inserting the graphene layer between metal and semiconductor, it is possible to overcome the inevitable atomic diffusion problem.”

While the research solved this problem, it also confirmed a prediction that it didn’t matter what kind of metal was used to form the Schottky junction; the performance does not change significantly.

The applications for Schottky diodes are pretty broad, but the main use is that of a rectifier, which converts alternating current (AC) to direct current (DC). But so many electronic devices use these diodes that this research is expected to resolve what has been a long-standing issue within the electronic industry.

Tags:  electronics  graphene interlayer  metal  rectifier  Schottky diodes  semiconductor 

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Electronics Applications for Graphene Hold Great Promise

Posted By Terrance Barkan, Monday, October 31, 2016

Applications that have really spurred a huge amount of graphene and other two-dimensional (2D) material research over the years have come from the field of electronics. The fear that complementary metal–oxide–semiconductor (CMOS) technology is quickly nearing the end of its ability to ward off Moore’s Law, in which the number of transistors in a dense integrated circuit doubles approximately every two years, has been the spur for much graphene research.

However, there has always been the big problem for graphene that it does not have an intrinsic band gap. It’s a pure conductor and not a semiconductor, like silicon, capable turning on and off the flow of electrons through it. While graphene can be functionalized in a way that it does have a band gap, research for it in the field of electronics have looked outside of digital logic where an intrinsic band gap is such an advantage. 

In the stories below, we see how graphene’s unrivaled conductivity is being exploited to take advantage of its strengths rather than trying to cover up for its weaknesses.

Graphene Comes to the Rescue of Li-ion Batteries

The role of graphene in increasing the charge capacity of the electrodes in lithium-ion (Li-ion) batteries has varied. There’s been “decorated graphene” in which nanoparticles are scattered across the surface of the graphene, and graphene nanoribbons, just to name a few of the avenues that have been pursued.

Another way in which graphene has been looked at is to better enable silicon to serve as the electrode material for Li-ion batteries. Silicon is a great material for increasing the storage capacity of electrodes in Li-ion batteries, but there’s one big problem: it cracks after just few charge/discharge cycles. The aim has been to find a way to make silicon so that it’s not so brittle and can withstand the swelling and shrinking during the charge charging and discharing of lithium atoms into the electrode material In these efforts, like those out Northwestern University, the role of graphene has been to sandwich silicon between layers graphene sheets in the anode of the battery.

Now, Yi Cui from both Stanford University and the Department of Energy’s SLAC National Accelerator Laboratory, who has been at the forefront of research to get silicon to be more flexible and durable for Li-ion batteries, has turned to graphene to solve the issue

Cui and his colleagues were able to demonstrate in research described in the journal Nature Energy, a method for to encasing each particle of silicon in a cage of graphene that enables the silicon to expand and contract without cracking. In a full-cell electrochemical test, the graphene-infused silicon anodes retained 90 percent of their charge capacity after 100 charge-discharge cycles. 

Previous attempts by Cui and many others to create nanostructured silicon has been very difficult, making mass production fairly impractical. However, based on these latest results, Cui believes that this approach is not only technologically possible, but may in fact be commercially viable.

The process involves coating the silicon particles with a layer of nickel. The nickel coating is used as the surface and the catalyst for the second step: growing the graphene. The final step of the process involves using an acid on the graphene-coated silicon particles so that the nickel is etched away.

“This new method allows us to use much larger silicon particles that are one to three microns, or millionths of a meter, in diameter, which are cheap and widely available,” Cui said in a press release. “Particles this big have never performed well in battery anodes before, so this is a very exciting new achievement, and we think it offers a practical solution.”

While a practical manufacturing approach was much needed, the technique also leads to an electrode material with very high charge capacity.

“Researchers have tried a number of other coatings for silicon anodes, but they all reduced the anode’s efficiency,” said Stanford postdoctoral researcher Kai Yan, in a press release. “The form-fitting graphene cages are the first coating that maintains high efficiency, and the reactions can be carried out at relatively low temperatures.”

Graphene Provides the Perfect Touch to Flexible Sensors

 

Photo: Someya Laboratory

Flexible sensors are the technological backbone of artificial skin technologies. The idea is that you can impart the sense of touch to a flexible sensor, making it possible to cover a prosthetic device for either a robot or replacement limb so it can feel. Creating materials that tick the boxes of flexibility, durability and sensitivity has been a challenge. Over the years, researchers have increasingly turned to nanomaterials, and graphene in particular, as a possible solution. 

Researchers at the University of Tokyo have found that nanofibers produced from a combination of carbon nanotubes and graphene overcomes some of the big problems facing flexible pressure sensors: they’re not that accurate after being bent or deformed. The researchers have suggested that the flexible sensor they have developed could provide a more accurate detection breast cancer.

In research described in the journal Nature Nanotechnology, the scientists produced their flexible sensor by employing organic transistors and a pressure sensitive nanofiber structure.

The researchers constructed the nanofiber structure using nanofibers with diameters ranging between 300 to 700 nanometers. The researchers produced the nanofibers by combining carbon nanotubes and graphene and mixing that into a flexible polymer. The nanofibers entangled with each other to form a thin, transparent structure.

In contrast to other flexible sensors in which the striving for accuracy makes the sensors too sensitive to being deformed in any way, the fibers in this new flexible sensor does not lose their accuracy in measuring pressures. These fibers achieve this because of their ability to change their relative alignment to accommodate the bending. This allows them to continue measuring pressure because it reduces the strain in individual fibers.

Tunable Graphene Plasmons Lead to Tunable Lasers

Illustration: University of Manchester

A few years ago, researchers found that the phenomenon that occurs when photons strike a metallic surface and stir up the movement of electrons on the surface to the point where the electrons form into waves—known as surface plasmons—also occurs in graphene. 

This discovery along with the ability to tune the graphene plasmons has been a big boon for the use of graphene in optoelectronic applications.  Now research out of the University of Manchester, led by Konstantin Novoselov, who along with Andre Geim were the two University of Manchester scientists who won the Nobel Prize for discovering graphene, has leveraged the ability of tuning graphene plasmons and combined it with terahertz quantum cascade lasers, making it possible to reversibly alter their emission. 

This ability to reversibly the alter the emission of quantum cascade lasers is a big deal in optoelectronic applicatiopns, such as fiber optics telecommunication technologies by offering potentially higher bandwidth capabilities.

“Current terahertz devices do not allow for tunable properties, a new device would have to be made each time requirements changed, making them unattractive on an industrial scale,” said Novoselov in a press release. “Graphene however, can allow for terahertz devices to be switched on and off, as well as altering their state.”

In research described in the journal Science, were able to manipulate the doping levels of a graphene sheet so that it generated plasmons on its surface. When this doped graphene sheet was combined with a terahertz quantum cascade laser, it became possible to tune the transmission of the laser by tuning the graphene plasmons, essentially changing the concentration of charge carriers.

Graphene Flakes Speed Up Artificial Brains

Illustration: Alexey Kotelnikov/Alamy


Researchers out of Princeton University have found that graphene flakes could be a key feature in computer chips that aim at mimicking the function of the human brain. 


In the human brain, neurons are used to transmit information by passing electrical charges through them. In artificial brains, transistors would take the place of neurons. One approach has been to construct the transistors out of lasers that would turn and off and the time intervals between the on and off states of the lasers would represent the 1s and 0s of digital logic.

One of the challenges that researchers have faced in this design is getting the time intervals between the laser pulses down to picosecond time scales, one trillionth of a second.

In research described in the journal Nature Scientific Reports, the Princeton researchers placed graphene flakes inside a semiconductor laser to act as a kind of “saturable absorber,” that absorbed photons and then was able to emit them in a quick burst. 

It turns out graphene possesses a number of properties that makes it attractive for this application. Not only can it absorb and release photons extremely quickly, but it can also work at any wavelength. What this means is that even if semiconductor lasers are emitting different colors, the graphene makes it possible for them to work together simultaneously without interfering with each other, leading to higher processing speeds.

 

 

 

 

 

Tags:  Batteries  Decorated Graphene  Electronics  Flexible Sensors  Graphene  Graphene Nanoribbons  Lasers  Li-ion  optoelectronics  Semiconductor 

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